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New AES software speed records

Authors:
Daniel J. Bernstein
Peter Schwabe
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URL: http://eprint.iacr.org/2008/381
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Abstract: This paper presents new speed records for AES software,taking advantage of (1) architecture-dependent reduction of instructions used to compute AES and (2) microarchitecture-dependent reduction of cycles used for those instructions. A wide variety of common CPU architectures---amd64, ppc32, sparcv9, and x86---are discussed in detail, along with several specific microarchitectures.
BibTeX
@misc{eprint-2008-18111,
  title={New AES software speed records},
  booktitle={IACR Eprint archive},
  keywords={implementation / AES, Advanced Encryption Standard, software implementation},
  url={http://eprint.iacr.org/2008/381},
  note={ peter@cryptojedi.org 14147 received 8 Sep 2008, last revised 25 Sep 2008},
  author={Daniel J. Bernstein and Peter Schwabe},
  year=2008
}