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A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2<sup>m</sup>)

Authors:
Johann Großschädl
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DOI: 10.1007/3-540-44709-1_18
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Conference: CHES 2001
BibTeX
@inproceedings{ches-2001-593,
  title={A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2<sup>m</sup>)},
  booktitle={Cryptographic Hardware and Embedded Systems - CHES 2001, Third International Workshop, Paris, France, May 14-16, 2001, Proceedings},
  series={Lecture Notes in Computer Science},
  publisher={Springer},
  volume={2162},
  pages={202-219},
  doi={10.1007/3-540-44709-1_18},
  author={Johann Großschädl},
  year=2001
}