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Paper: Efficient hardware for the Tate pairing calculation in characteristic three

Authors:
T. Kerins
W. P. Marnane
E. M. Popovici
P. S. L. M. Barreto
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URL: http://eprint.iacr.org/2005/065
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Abstract: In this paper the benefits of implementation of the Tate pairing computation in dedicated hardware are discussed. The main observation lies in the fact that arithmetic architectures in the extension field $GF(3^{6m})$ are good candidates for parallelization, leading to a similar calculation time in hardware as for operations over the base field $GF(3^m)$. Using this approach an architecture for the hardware implementation of the Tate pairing calculation based on a modified Duursma-Lee algorithm is proposed.
BibTeX
@misc{eprint-2005-12402,
  title={Efficient hardware for the Tate pairing calculation in characteristic three},
  booktitle={IACR Eprint archive},
  keywords={implementation / hardware},
  url={http://eprint.iacr.org/2005/065},
  note={ timk@rennes.ucc.ie 12842 received 28 Feb 2005},
  author={T. Kerins and W. P. Marnane and E. M. Popovici and P. S. L. M. Barreto},
  year=2005
}