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A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation
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Conference: | CHES 2016 |
Video from CHES 2016
BibTeX
@inproceedings{ches-2016-27836, title={A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation}, booktitle={CHES}, publisher={Springer}, pages={538-558}, doi={10.1007/978-3-662-53140-2_26}, author={Rei Ueno and Sumio Morioka and Naofumi Homma and Takafumi Aoki}, year=2016 }