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Paper: Classic McEliece on the ARM Cortex-M4

Authors:
Ming-Shing Chen , Ruhr University Bochum, Bochum, Germany
Tung Chou , Academia Sinica, Taipei, Taiwan
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DOI: 10.46586/tches.v2021.i3.125-148
URL: https://tches.iacr.org/index.php/TCHES/article/view/8970
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Abstract: This paper presents a constant-time implementation of Classic McEliece for ARM Cortex-M4. Specifically, our target platform is stm32f4-Discovery, a development board on which the amount of SRAM is not even large enough to hold the public key of the smallest parameter sets of Classic McEliece. Fortunately, the flash memory is large enough, so we use it to store the public key. For the level-1 parameter sets mceliece348864 and mceliece348864f, our implementation takes 582 199 cycles for encapsulation and 2 706 681 cycles for decapsulation. Compared to the level-1 parameter set of FrodoKEM, our encapsulation time is more than 80 times faster, and our decapsulation time is more than 17 times faster. For the level-3 parameter sets mceliece460896 and mceliece460896f, our implementation takes 1 081 335 cycles for encapsulation and 6 535 186 cycles for decapsulation. In addition, our implementation is also able to carry out key generation for the level-1 parameter sets and decapsulation for level-5 parameter sets on the board.
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BibTeX
@article{tches-2021-31280,
  title={Classic McEliece on the ARM Cortex-M4},
  journal={IACR Transactions on Cryptographic Hardware and Embedded Systems},
  publisher={Ruhr-Universit├Ąt Bochum},
  volume={2021, Issue 3},
  pages={125-148},
  url={https://tches.iacr.org/index.php/TCHES/article/view/8970},
  doi={10.46586/tches.v2021.i3.125-148},
  author={Ming-Shing Chen and Tung Chou},
  year=2021
}