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Threshold Implementations in Software: Micro-architectural Leakages in Algorithms
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Abstract: | This paper provides necessary properties to algorithmically secure firstorder maskings in scalar micro-architectures. The security notions of threshold implementations are adapted following micro-processor leakage effects which are known to the literature. The resulting notions, which are based on the placement of shares, are applied to a two-share randomness-free PRESENT cipher and Keccak-f. The assembly implementations are put on a RISC-V and an ARM Cortex-M4 core. All designs are validated in the glitch and transition extended probing model and their implementations via practical lab analysis. |
BibTeX
@article{tches-2023-33034, title={Threshold Implementations in Software: Micro-architectural Leakages in Algorithms}, journal={IACR Transactions on Cryptographic Hardware and Embedded Systems}, publisher={Ruhr-Universität Bochum}, volume={2023, Issue 2}, pages={155-179}, url={https://tches.iacr.org/index.php/TCHES/article/view/10280}, doi={10.46586/tches.v2023.i2.155-179}, author={John Gaspoz and Siemen Dhooghe}, year=2023 }