CryptoDB
On the Characterization of Phase Noise for the Robust and Resilient PLL-TRNG Design
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| Abstract: | A true random number generator (TRNG) is a critical component in ensuring the security of cryptographic systems. Among TRNG implementations, the phase-locked loop-based TRNG (PLL-TRNG) is a widely adopted solution for FPGA platforms due to the availability of a stochastic model. In the previous study, this stochastic model was based on analog noise signals, which potentially led to an oversimplification of the PLL physical process and resulted in an overestimation of entropy. To address this limitation, we extract key platform-specific parameters of the PLL and develop a new stochastic model tailored for multi-output PLL-TRNGs. For the first time, we reveal the effect of the PLL’s bandwidth on the correlation of sampling points and introduce a method for quantitatively controlling sampling point correlations. Finally, we validate the model through on-chip jitter measurements. Experimental results show that the proposed stochastic model accurately describes the behavior of the PLL-TRNG and provides the most conservative entropy lower bound, with a 1.8-fold improvement in jitter resolution. |
BibTeX
@article{tches-2025-35778,
title={On the Characterization of Phase Noise for the Robust and Resilient PLL-TRNG Design},
journal={IACR Transactions on Cryptographic Hardware and Embedded Systems},
publisher={Ruhr-Universität Bochum},
volume={2025},
pages={238-261},
url={https://tches.iacr.org/index.php/TCHES/article/view/12216},
doi={10.46586/tches.v2025.i3.238-261},
author={Ziheng Ma and Bohan Yang and Wenping Zhu and Hanning Wang and Yi Ouyang and Min Zhu and Leibo Liu},
year=2025
}