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Paper: Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?

Authors:
François-Xavier Standaert
Siddika Berna Örs
Bart Preneel
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DOI: 10.1007/978-3-540-28632-5_3
URL: https://iacr.org/archive/ches2004/31560030/31560030.pdf
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Conference: CHES 2004
BibTeX
@inproceedings{ches-2004-782,
  title={Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?},
  booktitle={Cryptographic Hardware and Embedded Systems - CHES 2004: 6th International Workshop Cambridge, MA, USA, August 11-13, 2004. Proceedings},
  series={Lecture Notes in Computer Science},
  publisher={Springer},
  volume={3156},
  pages={30-44},
  url={https://iacr.org/archive/ches2004/31560030/31560030.pdf},
  doi={10.1007/978-3-540-28632-5_3},
  author={François-Xavier Standaert and Siddika Berna Örs and Bart Preneel},
  year=2004
}