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Minoru Saeki
Publications
Year
Venue
Title
2013
CHES
On Measurable Side-Channel Leaks Inside ASIC Design Primitives
Takeshi Sugawara
Daisuke Suzuki
Minoru Saeki
Mitsuru Shiozaki
Takeshi Fujino
2009
CHES
A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques
Minoru Saeki
Daisuke Suzuki
Koichi Shimizu
Akashi Satoh
2006
CHES
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
Daisuke Suzuki
Minoru Saeki
2005
CHES
DPA Leakage Models for CMOS Logic Circuits
Daisuke Suzuki
Minoru Saeki
Tetsuya Ichikawa
Coauthors
Takeshi Fujino
(1)
Tetsuya Ichikawa
(1)
Akashi Satoh
(1)
Koichi Shimizu
(1)
Mitsuru Shiozaki
(1)
Takeshi Sugawara
(1)
Daisuke Suzuki
(4)