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Paper: LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security

Authors:
Florian Stolz , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
Nils Albartus , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
Julian Speith , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany; Max Planck Institute for Security and Privacy, Bochum, Germany
Simon Klix , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
Clemens Nasenberg , Max Planck Institute for Security and Privacy, Bochum, Germany
Aiden Gula , University of Massachusetts Amherst, MA, USA
Marc Fyrbiak , Max Planck Institute for Security and Privacy, Bochum, Germany; emproof, Bochum, Germany
Christof Paar , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany; Max Planck Institute for Security and Privacy, Bochum, Germany
Tim Güneysu , Ruhr University Bochum, Horst Görtz Institute for IT Security, Germany
Russell Tessier , University of Massachusetts Amherst, MA, USA
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DOI: 10.46586/tches.v2021.i4.412-446
URL: https://tches.iacr.org/index.php/TCHES/article/view/9071
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Abstract: Over the last decade attacks have repetitively demonstrated that bitstream protection for SRAM-based FPGAs is a persistent problem without a satisfying solution in practice. Hence, real-world hardware designs are prone to intellectual property infringement and malicious manipulation as they are not adequately protected against reverse-engineering.In this work, we first review state-of-the-art solutions from industry and academia and demonstrate their ineffectiveness with respect to reverse-engineering and design manipulation. We then describe the design and implementation of novel hardware obfuscation primitives based on the intrinsic structure of FPGAs. Based on our primitives, we design and implement LifeLine, a hardware design protection mechanism for FPGAs using hardware/software co-obfuscated cryptography. We show that LifeLine offers effective protection for a real-world adversary model, requires minimal integration effort for hardware designers, and retrofits to already deployed (and so far vulnerable) systems.
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BibTeX
@article{tches-2021-31322,
  title={LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security},
  journal={IACR Transactions on Cryptographic Hardware and Embedded Systems},
  publisher={Ruhr-Universität Bochum},
  volume={2021, Issue 4},
  pages={412-446},
  url={https://tches.iacr.org/index.php/TCHES/article/view/9071},
  doi={10.46586/tches.v2021.i4.412-446},
  author={Florian Stolz and Nils Albartus and Julian Speith and Simon Klix and Clemens Nasenberg and Aiden Gula and Marc Fyrbiak and Christof Paar and Tim Güneysu and Russell Tessier},
  year=2021
}